Substantially all modem electronic computers rely on semiconductor memory to store data and instructions for processing by a central processing unit (CPU). Such computers employing semiconductor memory vary from simple computers, such as those contained in telephone answering machines, to highly complex supercomputers employed for complicated scientific projects. In simple computers like those used for telephone answering machines, defects in one or more of the storage locations of the memory may be acceptable. For example, a mistake in the memory of the telephone answering machine likely would only cause the synthesized voice stored on the memory to be imperceptibly altered. However, one or more defective storage locations in a memory of a computer used to perform scientific calculations may cause substantial problems.
Although current manufacturing techniques have substantially reduced the number of defective storage locations, computer memory still is susceptible to such defective storage locations. Those defective memory locations can be caused by any of numerous steps taken during manufacture of the memory chips, semiconductor crystalinity defects, electrical connector discontinuities, etc. Although memory chips with such defective storage locations typically represent a small portion (less than 1%) of the total number of memory chips produced, the actual number of such defective memory chips is substantial. In some cases, such defective memory chips could be sold at a greatly reduced price for applications that do not require perfect memory, such as for telephone answering machines. However, it would be beneficial if some of those memory chips could be employed in more critical applications, such as in personal computers.
One way to enable such defective memory chips to be incorporated into personal computers would be to employ error correction schemes to compensate for defective storage locations. Error correction schemes add to each data word plural error correction bits that enable the data word to be reconstituted in the event of an erroneous data bit within the data word. However, such prior art error correction schemes typically only reconstitute a data word if only a single bit of the data word is erroneous. Such error correction schemes could be extended to detect multiple erroneous data bits, but the memory overhead that would result likely would be unacceptable.